Processor Design: system-on-chip computing for asics and FPGAs (Record no. 62242)

000 -LEADER
fixed length control field 00561nam a2200169Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 180620b2007 xxu||||| |||| 00| 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781402055294
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815 NUR
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Nurmi, Jari
245 ## - TITLE STATEMENT
Title Processor Design: system-on-chip computing for asics and FPGAs
Statement of responsibility, etc. Jari Nurmi
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. New York
Name of publisher, distributor, etc. Springer Verlag, Netherlands
Date of publication, distribution, etc. 2007
300 ## - PHYSICAL DESCRIPTION
Extent xix, 525p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Field programmable gate arrays
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Application-specific integrated circuits
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Systems on a chip
906 ## - LOCAL DATA ELEMENT F, LDF (RLIN)
a 2ebe4906ac1049107f933900bfd46e87
Holdings
Withdrawn status Lost status Damaged status Not for loan Collection code Home library Current library Shelving location Date acquired Source of acquisition Cost, normal purchase price Serial Enumeration / chronology Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
        REFERENCE SECTION LRC_JUIT LRC_JUIT Computer Science & Engineering 13/09/2012 Krishna Book Distributors 5188.60 Copy 1   REF 621.3815 NUR 028695 21/05/2019 21/05/2019 REFERENCE BOOK

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