Domain Specific Processors: systems, architectures and simulation Edited by S. S. Bhattacharyya

By: Bhattacharyya, Shuvra SMaterial type: TextTextPublication details: New York Marcel Dekker Inc. 1999Description: xi, 261pISBN: 0824747119Subject(s): Parallel Processing | MultoprocessorsDDC classification: 621.3822 BHA
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Item type Current library Collection Call number Vol info Status Date due Barcode Item holds
REFERENCE BOOK REFERENCE BOOK LRC_JUIT
Electronics & Communication Engineering 		REFERENCE SECTION REF 621.3822 BHA (Browse shelf (Opens below)) Copy 1 Not for loan 007278
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