Finite State Machine Datapath Design, Optimization, and Implementation by Justin Davis
Material type:
TextPublication details: New Jersey Morgan & Claypool 2008Description: ix, 113pISBN: 1598295314DDC classification: 621.395 DAV
Contents:
Contents:
1. Calculating maximum clock
| Item type | Current library | Collection | Call number | Vol info | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|---|
REFERENCE BOOK
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LRC_JUIT Electronics & Communication Engineering | REFERENCE SECTION | REF 621.395 DAV (Browse shelf (Opens below)) | Copy 1 | Not for loan | 019643 | ||
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REFERENCE BOOK
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LRC_JUIT Electronics & Communication Engineering | REFERENCE SECTION | REF 621.395 DAV (Browse shelf (Opens below)) | Copy 2 | Not for loan | 019644 |
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| REF 621.395 CHE Electrothermal Analysis of VLSI Systems | REF 621.395 CON Multilevel Optimization in VLSICAD | REF 621.395 DAV Finite State Machine Datapath Design, Optimization, and Implementation | REF 621.395 DAV Finite State Machine Datapath Design, Optimization, and Implementation | REF 621.395 DEL Electronic Device Architectures for the Nano-CMOS Era: from ultimate CMOS scaling to beyond CMOS devices | REF 621.395 DRE Towards One-Pass Synthesis | REF 621.395 DUE Digital Design With CPLD Applications and VHDL |
Contents:
1. Calculating maximum clock
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