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Introduction to Logic Synthesis using Verilog HDL by Robert B. Reese

By: Reese, Robert BContributor(s): Thornton, Mitchell AMaterial type: Text

TextPublication details: New Jersey Morgan & Claypool 2006Description: vii, 75pISBN: 1598291068Subject(s): Verlog ( Computer hardware description language) | Verilog HDLDDC classification: 621.392 REE

Contents:

Contents: Part 1. Digital logic review

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Item type	Current library	Collection	Call number	Vol info	Status	Date due	Barcode	Item holds
TEXT BOOK	LRC_JUIT Electronics & Communication Engineering	TEXTBOOK SECTION	621.392 REE (Browse shelf (Opens below))	Copy 1	Available		019703

Total holds: 0

Contents:
Part 1. Digital logic review

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