Low- Power CMOS Design Anantha Chandrakasan
Material type: TextPublication details: New York IEEE Press 2000Description: 629pISBN: 0780334299Subject(s): Low Voltage Integrated CircuitsDDC classification: 621.395 ROYItem type | Current library | Collection | Call number | Vol info | Status | Date due | Barcode | Item holds |
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REFERENCE BOOK | LRC_JUIT Electronics & Communication Engineering | REFERENCE SECTION | REF 621.395 CHA (Browse shelf (Opens below)) | Copy 1 | Not for loan | 011224 |
Total holds: 0
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REF 621.395 BAD System-On-Chip for Real-Time Applications | REF 621.395 BAK CMOS Mixed Signal Circuit Design | REF 621.395 BHA Compact MOSFET Models for VLSI Design | REF 621.395 CHA Low- Power CMOS Design | REF 621.395 CHE Electrothermal Analysis of VLSI Systems | REF 621.395 CON Multilevel Optimization in VLSICAD | REF 621.395 DAV Finite State Machine Datapath Design, Optimization, and Implementation |
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