RTL Hardware Design Using Vhdl: coding for efficiency, portability, and scalability by Pong P. Chu
Material type:
TextPublication details: New Jersey John Wiley & Sons 2006Description: xxiii, 669pISBN: 0471720925Subject(s): VHDL (Computer hardware description language) | Digital electronics -- Data processingDDC classification: 621.392 CHU
Contents:
Contents:
1. Introduction to digital sy
| Item type | Current library | Collection | Call number | Vol info | Status | Date due | Barcode | Item holds |
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REFERENCE BOOK
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LRC_JUIT Electronics & Communication Engineering | REFERENCE SECTION | REF 621.392 CHU (Browse shelf (Opens below)) | Copy 1 | Not for loan | 018964 |
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| REF 621.392 BER Verification Methodology Manual for System Verilog | REF 621.392 CAV Verilog HDL: digital design and modeling | REF 621.392 CAV Computer Arithmetic and Verilog HDL Fundamentals | REF 621.392 CHU RTL Hardware Design Using Vhdl: coding for efficiency, portability, and scalability | REF 621.392 COH VHDL coding styles and methodologies | REF 621.392 ELE System Synthesis with VHDL | REF 621.392 GIZ Embedded Processor-Based Self-Test |
Contents:
1. Introduction to digital sy
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