Designing with FPGAs and CPLDs Bob Zeidman
Material type:
TextPublication details: New Delhi Elsevier 2011Description: xvi, 220pISBN: 9789380501901Subject(s): Field programmable gate arrays -- Computer-aided design | Embedded computer systems -- Design | Programmable logic devices - data processingDDC classification: 621.395 ZEI
| Item type | Current library | Collection | Call number | Vol info | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|---|
TEXT BOOK
|
LRC_JUIT Electronics & Communication Engineering | TEXTBOOK SECTION | 621.395 ZEI (Browse shelf (Opens below)) | Copy 1 | Available | 032380 | ||
|
TEXT BOOK
|
LRC_JUIT Electronics & Communication Engineering | TEXTBOOK SECTION | 621.395 ZEI (Browse shelf (Opens below)) | Copy 2 | Available | 032381 | ||
|
TEXT BOOK
|
LRC_JUIT Electronics & Communication Engineering | TEXTBOOK SECTION | 621.395 ZEI (Browse shelf (Opens below)) | Copy 3 | Available | 032382 |
Total holds: 0
Browsing LRC_JUIT shelves, Shelving location: Electronics & Communication Engineering, Collection: TEXTBOOK SECTION Close shelf browser (Hides shelf browser)
|
|
|
|
|
|
|
||
| 621.395 ZAI VLSI Technology and Design | 621.395 ZAI VLSI Technology and Design | 621.395 ZEI Designing with FPGAs and CPLDs | 621.395 ZEI Designing with FPGAs and CPLDs | 621.395 ZEI Designing with FPGAs and CPLDs | 621.397 NIX Feature Extraction and Image Processing | 621.39732 HAR CMOS Memory Circuits |
There are no comments on this title.