Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits by Manoj Sachdev
Material type: TextPublication details: New Delhi Springer (India) Pvt Ltd 2007Edition: 2nd edDescription: xxi, 328 pISBN: 9788184894295Subject(s): VLSI circuitsDDC classification: 621.395 SAC
Contents:
<p>Table of Contents:</p>
<p>1. Introd
Item type | Current library | Collection | Call number | Vol info | Status | Date due | Barcode | Item holds |
---|---|---|---|---|---|---|---|---|
TEXT BOOK | LRC_JUIT Electronics & Communication Engineering | TEXTBOOK SECTION | 621.395 SAC (Browse shelf (Opens below)) | Copy 1 | Available | 024904 | ||
TEXT BOOK | LRC_JUIT Electronics & Communication Engineering | TEXTBOOK SECTION | 621.395 SAC (Browse shelf (Opens below)) | Copy 2 | Available | 025254 |
Total holds: 0
<p>Table of Contents:</p>
<p>1. Introd
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