OPAC_KOHA catalog › Details for: VLSI Implementation of Adder Cercuits Using Quaternary Signed Digit

Normal view MARC view ISBD view

VLSI Implementation of Adder Cercuits Using Quaternary Signed Digit by Shubham Gupta

By: Gupta, Shubham Contributor(s): Maheshwari, AkankshaMaterial type: Text

TextPublication details: Solan {HP} Jaypee University of Information Technology 2017Description: 57pSubject(s): Electronics & Communication EngineeringDDC classification: SPR 621 GUP

Tags from this library: No tags from this library for this title. Log in to add tags.

Average rating: 0.0 (0 votes)

Item type	Current library	Collection	Call number	Copy number	Status	Notes	Date due	Barcode	Item holds
B TECH PROJECT REPORTS	LRC_JUIT	PROJECT REPORT SECTION	SPR 621 GUP (Browse shelf (Opens below))	Copy 1	Not for loan	Guided by Shruti Jain		SP1317105

Total holds: 0

Previous	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	No cover image available No cover image available	Next
Previous	SPR 621 GUP Sidelobe Suppression of OFDM Based Cogitive Radio	SPR 621 GUP Microcontroller Based Home Security System	SPR 621 GUP FM Transmitter with Integrated Bluetooth	SPR 621 GUP VLSI Implementation of Adder Cercuits Using Quaternary Signed Digit	SPR 621 GUP Smart Medicine Box	SPR 621 GUP Techniques for Bandwidth Reduction in Controller Area Network	SPR 621 GUP Spectrum Management Techniques in Cognitive Radio Network	Next

There are no comments on this title.

to post a comment.