DRAM Curcuit Design: tutorial Brent Keeth
Material type:
TextPublication details: New York IEEE Press 2001Description: ix, 200pISBN: 0780360141Subject(s): Semiconductor storage device design and constructionDDC classification: 621.39732 KEE
| Item type | Current library | Collection | Call number | Vol info | Status | Date due | Barcode | Item holds |
|---|---|---|---|---|---|---|---|---|
TEXT BOOK
|
LRC_JUIT Electronics & Communication Engineering | TEXTBOOK SECTION | 621.39732 KEE (Browse shelf (Opens below)) | Copy 1 | Available | 014682 | ||
|
TEXT BOOK
|
LRC_JUIT Electronics & Communication Engineering | TEXTBOOK SECTION | 621.39732 KEE (Browse shelf (Opens below)) | Copy 2 | Available | 014683 | ||
REFERENCE BOOK
|
LRC_JUIT Electronics & Communication Engineering | REFERENCE SECTION | REF 621.39732 KEE (Browse shelf (Opens below)) | Copy 3 | Not for loan | 014684 |
Total holds: 0
Browsing LRC_JUIT shelves, Shelving location: Electronics & Communication Engineering, Collection: REFERENCE SECTION Close shelf browser (Hides shelf browser)
|
|
|
|
|
|
|
||
| REF 621.39732 DAL Analog BiCMOS Design: practice and pitfalls | REF 621.39732 HAR CMOS Memory Circuits | REF 621.39732 ITO VLSI Memory Chip Design | REF 621.39732 KEE DRAM Curcuit Design: tutorial | REF 621.39732 KUR Multi Voltage CMOS Circuit Design | REF 621.39732 MAH Hybrid CMOS Single-Electron-Transistor Device and Circuit Design | REF 621.39732 MOH Low-Power High-Level Synthesis for Nanoscale CMOS Circuits |
There are no comments on this title.