Hybrid CMOS Single-Electron-Transistor Device and Circuit Design Santanu Mahapatra
Material type: TextPublication details: Bostan Artech House 2006ISBN: 1596930691Subject(s): Metal oxide semiconductors, Complementary | Integrated circuits -- Design and constructionDDC classification: 621.39732 MAHItem type | Current library | Collection | Call number | Vol info | Status | Date due | Barcode | Item holds |
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REFERENCE BOOK | LRC_JUIT Electronics & Communication Engineering | REFERENCE SECTION | REF 621.39732 MAH (Browse shelf (Opens below)) | Copy 1 | Not for loan | 021335 |
Total holds: 0
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REF 621.39732 ITO VLSI Memory Chip Design | REF 621.39732 KEE DRAM Curcuit Design: tutorial | REF 621.39732 KUR Multi Voltage CMOS Circuit Design | REF 621.39732 MAH Hybrid CMOS Single-Electron-Transistor Device and Circuit Design | REF 621.39732 MOH Low-Power High-Level Synthesis for Nanoscale CMOS Circuits | REF 621.39732 PAV High Frequency Continuous Time Filter in Digital CMOS Processes | REF 621.39732 PRI High Performance Memories: new architecture DRAMs and SRAMs - evolution and function |
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