Phase-Locked Loops: design, simulation, and applications Roland E. Best.
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TextPublication details: New York McGraw-Hill 2007Edition: 6th edDescription: xii, 490p. + 1 CD-ROMISBN: 9780071493758Subject(s): Phase-locked loopsDDC classification: 621.3815364 BES
| Item type | Current library | Collection | Call number | Vol info | Status | Date due | Barcode | Item holds |
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REFERENCE BOOK
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LRC_JUIT Electronics & Communication Engineering | REFERENCE SECTION | REF 621.3815364 BES (Browse shelf (Opens below)) | Copy 1 | Not for loan | 026609 |
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| REF 621.381535 KAP Operational Amplifiers & Linear Integrated Circuits | REF 621.381536 YAO Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS | REF 621.3815364 ALA Digital Phase Lock Loops: architectures and applications | REF 621.3815364 BES Phase-Locked Loops: design, simulation, and applications | REF 621.3815364 CHE 60-GHZ CMOS Phase-Locked Loops | REF 621.3815364 GAR Phaselock Techniques | REF 621.381537 MAH Resilient Control of Uncertain Dynamical Systems |
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