Chip Design for Submicron VLSI: CMOS layout and simulation by John P. Uyemera

By: Uyemura, John PMaterial type: TextTextPublication details: India Thomson Learning 2006Edition: 1st edDescription: xvi, 470pISBN: 8131501957Subject(s): Integrated circuits -- Very large scale integration | Chip DesignDDC classification: 621.395 UYE
Contents:
<p>Chapter 1.Installing the Microwind S
Tags from this library: No tags from this library for this title. Log in to add tags.
    Average rating: 0.0 (0 votes)
Item type Current library Collection Call number Vol info Status Date due Barcode Item holds
TEXT BOOK TEXT BOOK LRC_JUIT
Electronics & Communication Engineering
TEXTBOOK SECTION 621.395 UYE (Browse shelf (Opens below)) Copy 1 Available 019368
TEXT BOOK TEXT BOOK LRC_JUIT
Electronics & Communication Engineering
TEXTBOOK SECTION 621.395 UYE (Browse shelf (Opens below)) Copy 2 Available 019369
TEXT BOOK TEXT BOOK LRC_JUIT
Electronics & Communication Engineering
TEXTBOOK SECTION 621.395 UYE (Browse shelf (Opens below)) Copy 3 Available 019370
TEXT BOOK TEXT BOOK LRC_JUIT
Electronics & Communication Engineering
TEXTBOOK SECTION 621.395 UYE (Browse shelf (Opens below)) Copy 4 Available 019371
TEXT BOOK TEXT BOOK LRC_JUIT
Electronics & Communication Engineering
TEXTBOOK SECTION 621.395 UYE (Browse shelf (Opens below)) Copy 5 Available 019372
Total holds: 0

<p>Chapter 1.Installing the Microwind S

There are no comments on this title.

to post a comment.

Library Home | Contact Us | LRC Help

Copyright @ 2020 LRC
Jaypee University of Information Technology
website hit counter

Powered by Koha