Bergeron, Janick <br/><br/>
Verification Methodology Manual for System Verilog 
by Janick Bergeron 
 - New York  Springer Verlag, Netherlands  2006 
 - xvii, 503 p. 
<br/><br/><p>Contents:</p><br/><br/><p>1. Introduction</p 
<br/><br/><label>ISBN: </label>0387255389 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Integrated circuits - Verification<br/>Verilog (Computer Hardware Description Language)
<br/><br/><label>Dewey Class. No.: </label>621.392 BER